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EDUCATION

Aug. 2017 - Present

Georgia Institute of Technology

Atlanta, GA, United States

Advisor : Sung Kyu Lim (GTCAD Laboratory)

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Mar. 2011 - Feb. 2013

Seoul National University

Seoul, Republic of Korea

Master of Science in Electrical Engineering and Computer Science

Advisor : Suhwan Kim (AMiC Laboratory)

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Mar. 2003 - Feb. 2011

Seoul National University

Seoul, Republic of Korea

Bachelor of Science in Electrical and Computer Engineering 

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EXPERIENCE

Aug. 2017 - Present

Graduate Research Assistant

GTCAD laboratory, Georgia Institute of Technology, Atlanta, GA, United States

Advisor: Prof. Sung Kyu Lim

Research Interests: Design and analysis of 2.5D/3D ICs

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  • RTL-to-GDS Tools and Methodologies for Sequential Integration Monolithic 3D ICs (DARPA, 2018 – 22)

  • A Vertically-Integrated Design Flow for IP Reuse and Heterogeneous Integration (DARPA, 2017 – 21)

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Apr. 2021 - Aug. 2021

Technical Internship

Synopsys Inc., Moutain View CA, United States (remote)

Research Interests: 3D IC design exploration

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Feb. 2013 - Jul. 2017

Engineer

Samsung Electronics Co., Ltd., Hwaseong, Repulic of Korea

Analog circuit designer in System LSI division

 

  • ​Security product development team

    • RF front-end design in Near Field Communication(NFC) IC

    • Magnetic Secure Transmission(MST) IC design

  • Display solution development team

    • Panel display driver IC design

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Mar. 2011 - Feb. 2013

Graduate Research Assistant

AMiC laboratory, Seoul National University, Seoul, Republic of Korea

Advisor: Prof. Suhwan Kim

Research Interests: Charge-recovery circuitry design

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  • Power clock generator design for charge-recovery circuitry

    • Design power clock generator using an active inductor using 65nm technology

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Dec. 2011 - Jul. 2012

Visiting Student

University of Michigan, Ann Arbor, MI, United States

Research Interests: Charge-recovery circuitry design

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  • Subthreshold Boost Logic (SBL), a dual-rail charge-recovery logic family

    • Power clock generator design in TSMC 65nm technology

    • Built-In Self-Test(BIST) logic design in TSMC 65nm technology

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HONORS AND AWARDS

Oct. 21st 2020

Best Paper Award

The 38th IEEE International Conference on Computer Design (ICCD), 2020.

Hartford, Connecticut, USA (Virtual)

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